| Patch | Description | Author | Forwarded | Bugs | Origin | Last update |
|---|---|---|---|---|---|---|
| 0001-Update-spirv-as-invocations-1934.patch | [PATCH 1/6] Update spirv-as invocations (#1934) After SPIRV-Tools commit 2e0f4b52 ("tools: refactorize tools flags parsing. (#5111)", 2023-02-27), spirv-as needs to be told explicitly when reading from stdin. |
Dmitry Sidorov <dmitry.sidorov@intel.com> | no | 2023-03-31 | ||
| 0002-Rename-ConvertFToTF32INTEL-to-RoundFToTF32INTEL-1913.patch | [PATCH 2/6] Rename ConvertFToTF32INTEL to RoundFToTF32INTEL (#1913) (#1937) Extension name will be preserved for a while for binary compatibility. |
Dmitry Sidorov <dmitry.sidorov@intel.com> | no | 2023-04-04 | ||
| 0003-Fix-standalone-builds-with-LLVM_LINK_LLVM_DYLIB-ON-1.patch | [PATCH 3/6] Fix standalone builds with LLVM_LINK_LLVM_DYLIB=ON (#1889) (#1981) Move the LLVM components to LINK_COMPONENTS because the DEPENDS list has the same semantics as add_dependencies(). In this case it doesn't include the LLVM components when calling the linker. It's almost complete revert of #1543 |
Dmitry Sidorov <dmitry.sidorov@intel.com> | no | 2023-04-27 | ||
| 0004-Fix-relationals-builtin-translation-bug.patch | [PATCH 4/6] Fix relationals builtin translation bug According OpenCL spec, the relationals builtin function shall return a '1' if the specified relation is true for scalar argument types. The functions shall return a '-1' (i.e. all bits set) if the specified relation is true for vector argument types. |
Wenwan Xing <wenwan.xing@intel.com> | no | 2023-05-09 | ||
| 0005-Use-fp_fast_mode-extension-with-the-capability-2028.patch | [PATCH 5/6] Use fp_fast_mode extension with the capability (#2028) | =?UTF-8?q?Pekka=20J=C3=A4=C3=A4skel=C3=A4inen?= | no | 2023-05-31 | ||
| 0006-Backport-to-16-Fix-SPIRV-Friendly-IR-mangling-for-op.patch | [PATCH 6/6] [Backport to 16] Fix SPIRV Friendly IR mangling for opcodes from cl_khr_integer_do_product (#2014) (#2016) | Mateusz Chudyk <mateuszchudyk@gmail.com> | no | 2023-06-04 | ||
| 0007-Backport-to-16-Split-JointMatrixMadINTEL-instruction.patch | [PATCH 07/30] [Backport to 16] Split JointMatrixMadINTEL instruction into 4 (#1833) JointMatrixMadINTEL will stand for signed/signed Matrix type JointMatrixSUMadINTEL will stand for signed/signed Matrix type JointMatrixUSMadINTEL will stand for unsigned/signed Matrix type JointMatrixUUMadINTEL will stand for unsigned/unsigned Matrix type Spec update: intel/llvm#8175 |
Dmitry Sidorov <dmitry.sidorov@intel.com> | no | 2023-02-15 | ||
| 0008-Backport-to-16-Workaround-unsupported-freeze-insn-20.patch | [PATCH 08/30] [Backport to 16] Workaround unsupported freeze insn (#2094) | LU-JOHN <111294400+LU-JOHN@users.noreply.github.com> | no | 2023-07-25 | ||
| 0009-Backport-to-16-OpaquePointers-Adjust-builtin-variabl.patch | [PATCH 09/30] [Backport to 16] [OpaquePointers] Adjust builtin variable tracking to support i8 geps. (#2060) The existing logic for the replacement of builtin variables with calls to functions relies on relatively brittle tracking that is broken when opaque pointers is turned on, and will be even more thoroughly broken if/when typed geps are replaced with i8 geps or ptradd. This patch replaces that logic with a less brittle variant that is able to handle any sequence of bitcast, gep, or addrspacecast instructions between the global variable and the ultimate load instruction. It still will error out if the variable is used in too insane of a fashion (say, trying to load an i32 out of the i64, or a misaligned vector type). |
Mateusz Chudyk <mateusz.chudyk@intel.com> | no | 2023-08-04 | ||
| 0010-Support-for-SPV_INTEL_cache_controls-2146.patch | [PATCH 10/30] Support for SPV_INTEL_cache_controls (#2146) Cherry-pick of KhronosGroup/SPIRV-LLVM-Translator#2140 |
Andrzej Ratajewski <andrzej.ratajewski@intel.com> | no | 2023-09-12 | ||
| 0011-Backport-to-16-Initial-support-NonSemantic.Kernel.De.patch | [PATCH 11/30] [Backport to 16] Initial support NonSemantic.Kernel.DebugInfo.100 (#1846) This patch implements the initial support for the new debug specification NonSemantic.Kernel.DebugInfo.100. It also introduces support for the new debug instruction DISubrange. |
Viktoria Maximova <viktoria.maksimova@intel.com> | no | 2023-02-20 | ||
| 0012-Backport-to-16-DebugInfo-Add-Target-Function-optiona.patch | [PATCH 12/30] [Backport to 16][DebugInfo] Add Target Function optional parameter to DebugFunction (#1853) It's being added in KhronosGroup/SPIRV-Registry#186 In DWARF it's used in 'trampoline' functions generated for Fortran external function calls. |
Dmitry Sidorov <dmitry.sidorov@intel.com> | no | 2023-02-23 | ||
| 0013-Backport-to-16-DebugInfo-Add-new-Source-Languages-ta.patch | [PATCH 13/30] [Backport to 16][DebugInfo] Add new Source Languages table used in DebugCompilationUnit (#1854) This extended source language table is used by DebugCompilationUnit instruction when the extension is enabled. It enables support for more languages than exists in a core specification. Enabling of Fortran language also allowed to fix FortranArray test that was originally XFAIL-ed in 9e234d9. |
Viktoria Maximova <viktoria.maksimova@intel.com> | no | 2023-02-23 | ||
| 0014-Backport-to-16-DebugInfo-Add-an-option-for-NonSemant.patch | [PATCH 14/30] [Backport to 16][DebugInfo] Add an option for NonSemantic.Shader.DebugInfo.100 (#1855) Under this option this extended instruction set will be implemented Spec: https://github.com/KhronosGroup/SPIRV-Registry/blob/main/nonsemantic/NonSemantic.Shader.DebugInfo.100.asciidoc NonSemantic.Shader.DebugInfo.200 when the name is stable |
Dmitry Sidorov <dmitry.sidorov@intel.com> | no | 2023-03-01 | ||
| 0015-Backport-to-16-DebugInfo-Add-DebugTypeArrayDynamic-t.patch | [PATCH 15/30] [Backport to 16][DebugInfo] Add DebugTypeArrayDynamic translation (#1871) This instruction describes a dynamic array, mostly for Fortran 90. Unlike DebugTypeArray it has Data Location, Associated, Allocated and Rank parameters. If the appropriate metadata parameters appear in LLVM IR in DW_TAG_array_type metadata, then such debug type becomes treated as dynamic array by the translator (of course if the appropriate extended instruction set is enabled). Spec: https://github.com/KhronosGroup/SPIRV-Registry/pull/186 |
Dmitry Sidorov <dmitry.sidorov@intel.com> | no | 2023-03-08 | ||
| 0016-Backport-to-16-DebugInfo-Support-translation-of-DISt.patch | [PATCH 16/30] [Backport to 16][DebugInfo] Support translation of DIStringType (#1877) This type instruction describes a string, mostly for Fortran 90. Spec: KhronosGroup/SPIRV-Registry#186 |
Viktoria Maximova <viktoria.maksimova@intel.com> | no | 2023-03-10 | ||
| 0017-Backport-to-16-DebugInfo-Support-translation-of-DIMo.patch | [PATCH 17/30] [Backport to 16][DebugInfo] Support translation of DIModule (#1878) This entity represents a module in the programming language, for example a Fortran module. Spec: KhronosGroup/SPIRV-Registry#186 The implementation is the same as for SPV_INTEL_debug_module extension. Spec for extension: https://github.com/intel/llvm/blob/sycl/sycl/doc/design/spirv-extensions/SPV_INTEL_debug_module.asciidoc |
Viktoria Maximova <viktoria.maksimova@intel.com> | no | 2023-03-13 | ||
| 0018-Backport-to-16-DebugInfo-Start-adopting-debug-info-i.patch | [PATCH 18/30] [Backport to 16][DebugInfo] Start adopting debug info instructions for NonSemantic set (#1887) List of changes: All Literal parameters of instructions in OpenCL.DebugInfo.100 are OpConstants in NonSemantic.Shader.DebugInfo.100 and NonSemantic.Shader.DebugInfo.200; SPV_KHR_non_semantic_info is being implicitly added for nonsemantic debug info; |
Dmitry Sidorov <dmitry.sidorov@intel.com> | no | 2023-03-21 | ||
| 0019-Backport-to-16-DebugInfo-Rename-NonSemantic.Kernel.D.patch | [PATCH 19/30] [Backport to 16][DebugInfo] Rename NonSemantic.Kernel.DebugInfo.100 (#1891) To NonSemantic.Shader.DebugInfo.200 |
Dmitry Sidorov <dmitry.sidorov@intel.com> | no | 2023-03-20 | ||
| 0020-Backport-to-16-DebugInfo-Add-more-source-languages-a.patch | [PATCH 20/30] [Backport to 16][DebugInfo] Add more source languages and align to spec changes (#1894) | Viktoria Maximova <viktoria.maksimova@intel.com> | no | 2023-03-21 | ||
| 0021-Backport-to-16-DebugInfo-Align-Instruction-names-to-.patch | [PATCH 21/30] [Backport to 16][DebugInfo] Align Instruction names to the specification (#1896) This patch fixes the discovered typos in Debug Instruction names, so we can generate spec-conformant SPIR-V module. https://registry.khronos.org/SPIR-V/specs/unified1/DebugInfo.html |
Viktoria Maximova <viktoria.maksimova@intel.com> | no | 2023-03-23 | ||
| 0022-Backport-to-16-Preserve-invalid-SPIRV-source-lang-li.patch | [PATCH 22/30] [Backport to 16] Preserve invalid SPIRV source lang literal in module metadata (#1951) (#1980) Some SPIR-V producers generate invalid source language value (invalid = other than the enum values defined in spv::SourceLanguage). While in many cases this is rightly translated to DW_LANG_OpenCL, the original source language value should be preserved in LLVM module metadata for later use by LLVM IR consumers. |
Mateusz Chudyk <mateuszchudyk@gmail.com> | no | 2023-05-04 | ||
| 0023-Backport-to-16-Backport-spirv-preserve-auxdata-chang.patch | [PATCH 23/30] [Backport to 16] Backport spirv-preserve-auxdata changes (#2187) Backport the below changes to 16: f729c49 89d658c 9823690 d498f48 d24b9c6 I made the following changes that are not in the original changes: Port tests to not use opaque pointers and related flags except for one test Fix patch fail due to missing unrelated function in this branch |
Nick Sarnie <sarnex@users.noreply.github.com> | no | 2023-10-16 | ||
| 0024-Backport-to-16-OpaquePointers-Handle-llvm.memset-int.patch | [PATCH 24/30] [Backport to 16][OpaquePointers] Handle llvm.memset intrinsic mangling mismatches. (#2182) Original change: https://github.com/KhronosGroup/SPIRV-LLVM-Translator/commit/bdd765263a0a7184dbd18fe5396313802f731e25 Non-constant @llvm.memset calls are presently lowered by generating synthetic functions with the mangled name of memset. However, the reader tries to use this name to generate the intrinsic call again. This causes verification issues if the SPIRVWriter and SPIRVReader do not agree on whether or not to use opaque pointers. This change uses the actual type of the function (which will take into account whether or not it is in opaque pointer mode) to generate the LLVM intrinsic name, fixing the mismatch issues. |
Viktoria Maximova <viktoria.maksimova@intel.com> | no | 2023-10-23 | ||
| 0025-Implement-support-for-SPV_KHR_shader_clock-2026-2206.patch | [PATCH 25/30] Implement support for SPV_KHR_shader_clock (#2026) (#2206) Link to the spec: https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/KHR/SPV_KHR_shader_clock.asciidoc |
Aleksander Mielczarek <110471911+naxiiv@users.noreply.github.com> | no | 2023-11-08 | ||
| 0026-Backport-to-16-Fix-SPIR-V-global-to-function-replace.patch | [PATCH 26/30] [Backport to 16] Fix SPIR-V global to function replacement for differing load types (#2160) (#2244) In some cases, we will see IR with the following @__spirv_BuiltInGlobalInvocationId = external dso_local local_unnamed_addr addrspace(1) constant <3 x i64>, align 32 ... %0 = load <6 x i32>, ptr addrspace(1) @__spirv_BuiltInGlobalInvocationId, align 32 %1 = extractelement <6 x i32> %0, i64 0 Note the global type and load type are different. Change the handling of vector loads from vector globals to reconstruct the global vector type and then bitcast to the load type. Thanks to @jcranmer-intel for helping me find the simplest solution. |
Maksim Shelegov <maksim.shelegov@intel.com> | no | 2023-11-29 | ||
| 0027-Backport-to-16-Update-LongConstantCompositeINTEL-to-.patch | [PATCH 27/30] [Backport to 16] Update LongConstantCompositeINTEL to LongCompositesINTEL capability after Headers change (#2309) The original change: https://github.com/KhronosGroup/SPIRV-LLVM-Translator/commit/0166a0fb86dc6c0e8903436bbc3a89bc3273ebc0 * Bump SPIRV-Headers to 1c6bb2743599e6eb6f37b2969acc0aef812e32e3 * replace internal SPV_INTEL_long_composites ext with the published SPV_INTEL_long_composites * don't rename extension for now This closes: https://github.com/KhronosGroup/SPIRV-LLVM-Translator/issues/2261 |
Viktoria Maximova <viktoria.maksimova@intel.com> | no | 2024-01-23 | ||
| 0028-Backport-to-16-add-initial-f16-type-support-for-atom.patch | [PATCH 28/30] [Backport to 16] add initial f16 type support for atomicrmw in llvm-spirv translator (#2210) (#2333) This PR aims to add f16 type support for atomicrmw in llvm-spirv translator, with the reference to the extension documented in [1]. There are two concerns related to the subject: SPIRVAtomicFAddEXTInst::getRequiredExtension() should return a list of required extension to support the requirement to list both SPV_EXT_shader_atomic_float16_add and SPV_EXT_shader_atomic_float_add extensions in the module (see "Extension Name" section of the ref [1]). However, the return type is std::optional<ExtensionID> and returning a vector would need a bigger rework. Including SPV_EXT_shader_atomic_float16_add into --spirv-ext argument of llvm-spirv doesn't result in producing the correspondent capability (AtomicFloat16AddEXT) and extension in a SPIRV output. $ llvm-spirv AtomicFAddEXT.ll.tmp.bc --spirv-ext=+SPV_EXT_shader_atomic_float_add,+SPV_EXT_shader_atomic_float16_add -o AtomicFAddEXT.ll.tmp.spv $ llvm-spirv -to-text AtomicFAddEXT.ll.tmp.spv -o /dev/stdout ... 2 Capability AtomicFloat32AddEXT 2 Capability AtomicFloat64AddEXT 9 Extension "SPV_EXT_shader_atomic_float_add" ... This prevents extending the test case of AtomicFAddEXT.ll in EXT/SPV_EXT_shader_atomic_float. References: [1] https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/EXT/SPV_EXT_shader_atomic_float16_add.asciidoc |
Mateusz Chudyk <mateuszchudyk@gmail.com> | no | 2024-02-01 | ||
| 0029-Preserve-DIExpression-in-DIGlobalVariableExpression-.patch | [PATCH 29/30] Preserve DIExpression in DIGlobalVariableExpression (#2325) Ensure that SPIR-V that uses a DebugGlobalVariable's Variable field to hold an Expression can be reverse translated. A Variable field can be used to hold an Expression in order to preserve a DIExpression in a DIGlobalVariableExpression in LLVM IR. |
LU-JOHN <111294400+LU-JOHN@users.noreply.github.com> | no | 2024-02-02 | ||
| 0030-SPV-SPV-IR-Fix-image-builtin-mangling-of-unsigned-ty.patch | [PATCH 30/30] [SPV -> SPV-IR] Fix image builtin mangling of unsigned type (#2273) (#2337) Return type of image read and Texel type of image write builtins may be unsigned. Before this PR, the builtin names in SPIR-V Friendly IR were always mangled with signed type. (cherry picked from commit e9b95fbc3f58c7d8084620fd58b8bd936c640d37) |
Wenju He <wenju.he@intel.com> | no | 2024-02-03 | ||
| 0031-Backport-to-16-Fix-allowed-types-for-OpConstantNull-.patch | [PATCH 31/37] [Backport to 16] Fix allowed types for OpConstantNull (#2361) The SPIR-V Specification allows `OpConstantNull` types to be scalar or vector booleans, integers, or floats. Update an assert for this and add a SPIR-V -> LLVM IR test. (cherry picked from commit 9ec969c1c379bde69522b3b9278e5f7aa1a2c9f9) |
Sven van Haastregt <sven.vanhaastregt@arm.com> | no | 2024-02-15 | ||
| 0032-Backport-to-16-cmake-Fix-using-spirv-tools-package-o.patch | [PATCH 32/37] [Backport to 16] cmake: Fix using spirv-tools package on Ubuntu 22.04 (#2370) When using the `spirv-tools` system package on Ubuntu 20.04 the `SPIRV-Tools-shared` CMake target, which represents `/usr/lib/x86_64-linux-gnu/libSPIRV-Tools.so`, is imported and used for linking and include directories. However, on Ubuntu 22.04 it does not exist which results in the following error: ``` CMake Error at /builds/SPIRV-LLVM-Translator/CMakeLists.txt:124 (get_target_property): get_target_property() called with non-existent target "SPIRV-Tools-shared". ``` Instead, on Ubuntu 22.04 the `SPIRV-Tools-static` CMake target is imported, which represents `/usr/lib/x86_64-linux-gnu/libSPIRV-Tools.a`, which suggests the project or package maintainers changed the default library type being compiled. This patch updates the `CMakeLists.txt` to check if either of these targets exists, preferring the shared library, before attempting to get properties from the target or use it as a link library. If neither target exists it is treated as a fatal error. (cherry picked from commit beea2491397d74aa25db12c318ca28bc8032518d) |
Sven van Haastregt <sven.vanhaastregt@arm.com> | no | 2024-02-21 | ||
| 0033-Add-support-for-IAddCarry-SPIRV-instruction-2167.patch | [PATCH 33/37] Add support for IAddCarry SPIRV instruction (#2167) This commit implements bidirectional translation of the llvm.uadd.with.overflow and the IAddCarry intrinsic. Intrinsic llvm.uadd.with.overflow returns struct which second element have a type of i1. The llvm type i1 is, in llvm-spirv, directly translated to BoolType. SPIRV specification requires that the composite which returns from IAddCarry needs to have both elements of the same type. In result, current implementation is not compliant and should be considered temporary. |
bwlodarcz <bertrand.wlodarczyk@intel.com> | no | 2023-10-12 | ||
| 0034-Add-support-for-ISubBorrow-SPIRV-instruction-2168.patch | [PATCH 34/37] Add support for ISubBorrow SPIRV instruction (#2168) This commit implements bidirectional translation of the llvm.usub.with.overflow and the ISubBorrow intrinsic. Intrinsic llvm.usub.with.overflow returns struct which second element have a type of i1. The llvm type i1 is, in llvm-spirv, directly translated to BoolType. SPIRV specification requires that the composite which returns from ISubBorrow needs to have both elements of the same type. In result, current implementation is not compliant and should be considered temporary. |
bwlodarcz <bertrand.wlodarczyk@intel.com> | no | 2023-10-13 | ||
| 0035-Backport-to-16-Support-SPV_INTEL_maximum_registers-e.patch | [PATCH 35/37] [Backport to 16] Support SPV_INTEL_maximum_registers extension (#2344) (#2390) Spec: KhronosGroup/SPIRV-Registry#235 * Add infrastructure for translating ExecutionModeId (#2297) This functionality was added in SPIR-V 1.2 and allows using an <id> to set the execution modes SubgroupsPerWorkgroupId, LocalSizeId, and LocalSizeHintI, and others. |
Vlad Korovin <vladislav.korovin@intel.com> | no | 2024-03-06 | ||
| 0036-Backport-to-16-Handle-OpVectorShuffle-with-differing.patch | [PATCH 36/37] [Backport to 16] Handle OpVectorShuffle with differing vector sizes (#2391) (#2411) The SPIR-V to LLVM conversion would bail out when encountering an `OpVectorShuffle` whose vector operands differ in size. SPIR-V allows differing vector sizes, but LLVM's `shufflevector` does not. Remove the assert and insert an additional `shufflevector` to align the vector operands when needed. (cherry picked from commit 3df5e38250a6d7c50b58fbb0393be81d909487ff) |
Sven van Haastregt <sven.vanhaastregt@arm.com> | no | 2024-03-06 | ||
| 0037-LLVM-16-Remove-dependency-on-SPIRV-Headers-for-SPV_I.patch | [PATCH 37/37] [LLVM-16] Remove dependency on SPIRV-Headers for SPV_INTEL_maximum_registers (#2436) | Viktoria Maximova <viktoria.maksimova@intel.com> | no | 2024-03-13 | ||
| visibility-hidden.patch | reduce the amount of symbols exposed by the library | Andreas Beckmann <anbe@debian.org> | no |